Computer systems and other electronic devices typically comprise integrated circuits, which may comprise semiconductors, transistors, wires, programmable logic devices, and programmable gate arrays, and which may be organized into chips, circuit boards, storage devices, and processors, among others.
The automated design of integrated circuits requires specification of a logic circuit by a designer. One technique for physically designing digital integrated logic circuits is known as the standard cell technique, in which physical layouts and timing behavior models are created for simple logic functions such as AND, OR, NOT, or FlipFlop. These physical layouts are known as “standard cells.” A large group of pre-designed standard cells is then assembled into a standard cell library. Automated tools read a netlist description of the integrated circuit, or netlist representing the desired logical functionality for a chip (sometimes referred to as a behavioral or register-transfer-level description), and map it into an equivalent netlist composed of standard cells from the selected standard cell library. This process is commonly known as “synthesis.”
A netlist is a data structure representation of the electronic logic system that comprises a set of modules, each of which comprises a data structure that specifies sub-components and their interconnection via wires, which are commonly called “nets.” The netlist describes the way in which standard cells and blocks are interconnected. Netlists are typically available in VERILOG, EDIF (Electronic Design Interchange Format), or VHDL (Very High Speed Integrated Circuit Hardware Design Language) formats.
Other tools read a netlist comprised of standard cells and create a physical layout of the chip by placing the cells relative to each other to minimize timing delays or wire lengths, then creating electrical connections (or routing) between the cells to physically complete the design of the desired circuit. The design may then be sent to a fabrication vendor that fabrics a chip that implements the circuit (an application-specific integrated circuit or ASIC), or the design may be loaded into a field programmable gate array (FPGA). An FPGA comprises programmable logic components called logic blocks and a hierarchy of reconfigurable interconnects, which allow the blocks to be inter-wired in many different configurations.